[MUSIC PLAYING]
We all know that the internet of things, as well
as the technologies that have enabled intelligence
at the edge, present unlimited opportunities
to transform business with analytics and AI.
But these all require AI at the edge, along with cost and power
constraints.
The need for intelligent, low-latency, edge computing
creates an opportunity for innovative, chip-level
architectures that address costs,
as well as the benefits of compute efficiency, which
means getting more computation at lower power.
Intel addresses these challenges with its newest,
compute-efficient architecture, the Intel Movidius Myriad X VPU
for vision and AI at the edge.
Our VPU offers optimized dataflow
between compute-efficient engines,
including a specialized, deep learning accelerator,
making it one of the most innovative architectures
in computer vision today.
First, the chip architecture is tailored for dataflow.
In traditional chip architectures,
optimized computation of data is achieved
by moving the data to specialized compute units.
But moving data back and forth from extraneous data buffers
comes at a cost, namely, power consumption.
With the Intel Movidius VPU, we've
achieved lower power by minimizing data movement
on the chip.
We do this by utilizing a singular, centralized
scratchpad memory.
This multi-ported, intelligent memory fabric
speeds dataflow through the chip to reduce power consumption.
What's more, Movidius VPU's tools
provide automated dataflow management,
which helps make programming more efficient
by handling the dataflow and data
dependencies of the functions in an application.
Next, we add superior compute efficiency and flexibility.
How do we offer sufficient vision application performance
at a reasonable power and cost?
The Movidius VPU architecture combines a set
of hardware-optimized vision and image processing accelerators,
together with an array of 16 programmable VLIW processors,
with an instruction set tuned for computer vision.
So developers can take advantage,
when porting their algorithms, to have both performance
optimization and software flexibility
at their fingertips.
Finally, the Movidius VPU employs
a specialized, deep learning, inference accelerator,
called the Neural Compute Engine,
with enough raw performance to support multiple AI inference
applications simultaneously, such as detection
and classification.
And the Neural Compute Engine runs AI algorithms
in parallel with the other imaging
and computer vision algorithms on the chip.
For edge servers and intelligent appliances,
multiple Intel Movidius VPU chips
are brought together in PCIe form factor accelerator cards
to help developers achieve sufficient performance
with compute efficiency.
And with our Intel distribution of OPENVINO
toolkit to compile their AI deep learning
algorithms to run on these accelerator cards,
developers can scale AI performance at the edge.
[MUSIC PLAYING]